The program unloads the image of RAM CPU mode HALT = 8kb .

 

A small comment:

 

 

 

CPU RAM card = 64kb (as presented for the processor)

 

----------------------------------------- ----- -

| |    |   USER     |   HALT     | 

| Address | KB | ----------- | ----------- |

|               |      | Use | B / W | Use | B / W |

----------------------------------------- -------

| 177776/177777 |      | X | W / w | RAM | W / w |

| ............. | 2   | | W / w | RAM | W / w |

| 174 002 / 174003 | HALT | X | W / w | RAM | W / w |

| 174000 / 174 001 |      | X | W / w | RAM | W / w |

----------------------------------------- ----- -

| 173 776 / 173 777 |    | X | X | RAM | RAM |  

| ............. | 6   | X | X | RAM | RAM |

| 160002/160003 | HALT X   |  X   | RAM | RAM |

| 160000/160001 |      | X   |  X   | RAM | RAM | 

---------------- ------------------------- ----- -

| 157776/157777 |    | RAM | RAM | | ? | 

| ............. | 56   | RAM | RAM | ? | ? |

| 000002/000003 | USER | RAM | RAM | ? | ? |

| 000000/000001 |      | RAM | RAM | ? | ? |

---------------- ------------------------- -------

 

Thus, one way or another , all 64kb of RAM of the central processor are available for Execution. Of these, the lower 56kb is available in USER mode (this RAM area is called “USER mode CPU RAM”), and the upper 8kb is available in HALT mode (this RAM area is called “ HALT mode CPU RAM ”).

 

Using this mechanism, the UKSC has implemented a system for protecting the “core” program code from application program code. If an unintentional failure occurs in the user program, the kernel program code will not be damaged and the computer will be able to correctly execute the system error handler code. Of course, loading application programs is allowed only in the RAM area of ​​USER mode. Downloading to HALT RAM directly is not possible, however, the user program can do this in a roundabout way (thus, for example, in BASIC of the UKSC , the behavior of the machine is rewritten by pressing the STOP key ).

 

 

 

For the “chronicler” of the UKSC, 8kb of program code located in the RAM of the HALT mode is of interest . USER mode RAM (all 56kb) is reset to zero after the computer is turned on.

 

Before proceeding with the description of the procedure for unloading these 8kb, I will answer two questions that, most likely, have already arisen:

1) how are these 8kb of RAM initially filled, because there are no ROMs on the CPU line;          

2) how can the top 2kb of RAM be read if they are not available for Reading in HALT mode, much less in USER mode.          

 

Answers (briefly):

1) 8kb of RAM HALT mode CPUs are filled by the command of a peripheral processor (PP), to which the ROM is connected, and which can access not only its RAM (volume , by the way, not 32kb, but 64kb), but also to the RAM of the central processor (volume which, by the way, is also not equal to 64kb, but 128kb);          

2) CPU means - no way! This can be done only by means of a peripheral processor (PP).          

* Detailed answers - see in the file describing the memory device of the UKSC (part 4) .

 

 

 

Thus, in a nutshell, the algorithm is as follows:

1) we introduce a program into RAM RAM that, using the direct memory access means (analogue to DMA on a PC), copies the contents of 8kB of HALT mode CPU RAM to any area of ​​USER mode RAM that is the same 8kb in size;          

2) in the memory of the CPU RAM (USER mode RAM) we enter a program that transfers 8kb of clone (also located in the USER mode RAM ) through the “Joint C2” port to the PC COM port .          

* The “Joint C2” port, as well as the “Local Area Network” port, are the only two external ports in the UKSC that are accessible from the main processor trunk. The remaining external I / O ports are accessible from the peripheral processor backbone.

 

 

 

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1) carry out a full reset of the computer

2) in the PP monitor, start the PP program

3) in the CPU monitor, start the CPU program

 

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PP program

 

P forwards 4096 words of HALT CPU RAM to addresses 160000-177777 to USER CPU CPU to addresses 060000-077777 .

 

address macro code             

020000 012 737 MOV # 070000, # @ 177 010 ; read HALT -OZU CPU in the addresses 160000-177777                                                                     

020002 070000 ; (160000/2 = 070000)                                                                     

020004 177010             

020006 012700 MOV # 040000, R 0 ; write to the USER- RAM RAM in the address 060000-077777                                                                     

020010 040000 (160000/2 xor 060000/2 = 040000)                                                                     

020012 012701 MOV # 010000, R 1 ; we forward 010000 words (020000 bytes)                                                                     

020014 010000             

                            L 1 :; repeat                                         

020016 013702 MOV @ # 177014, R 2 ; we read the next word from HALT - RAM RAM                                                                     

020020 177014 ;    at { 177010 } * 2 in R 2                                                                     

020022 074037 XOR R 0, @ # 177010 ; switch to page 060000-077777                                                                     

020024 177010             

020026 010237 MOV R 2, @ # 177014 ; write the contents of R 2 in the USER - RAM RAM                                                                     

020030 177014 ; at {177010} * 2                                                                     

020032 074037 XOR R 0, @ # 177010 ; switch to page 160000-177777                                                                     

020034 177010             

020036 005237 INC @ # 177010 move to the next word                                                                     

020040 177010 ; {177010} * 2: = ({177010} + 1) * 2                                                                     

020042 077113 SOB R 1, L 1 decrease the word counter R 1: = R 1-1                                                                     

                                                                      ; until 010000 words transmitted (020000 bytes)

020044 000000 HALT ; end                                                                     

 

Before starting it is necessary to check that PSW = 000200 (otherwise, there may be a failure in the control of the RAP device if the program is interrupted by an interrupt that draws characters on the screen) .

The contents of some HALT cells - CPU RAM (system variables of the CPU monitor) may vary depending on previous computer operation .

 

=================================================== ================================

 

CPU program

 

It transfers 8192 bytes of the image of the HALT CPU RAM from the addresses 160000-177777, uploaded to the USER CPU RAM at the addresses 060000-077777, to the data source of the Joint C2 source .

 

address macro code             

001000 012700 MOV # 060000, R 0 ; send the contents of the USER -CPU RAM                                                                     

001002 060000 at addresses 060000-077777                                                                     

001004 012701 MOV # 020000, R 1 ; send 020000 bytes (010000 words)                                                                     

001006 020000             

                            L 2 :; repeat                                         

                            L 3 :;  repeat                                         

001010 105737 TSTB @ # 176574 ; check source readiness                                                                     

001012 176574 ;      (bit # 7 = 1) of junction C2                                                                     

001,014 100,375 BPL L 3 until the source is ready (bit # 7 = 1)                                                                     

001016 112037 MOVB ( R 0) +, @ # 176576 ; send another image byte                                                                     

001020 176576 ;    HALT - О ЗУ Ц П in Butt С2                                                                     

                                                                      and perform an offset of 1 byte R 0: = R 0 + 1 

001022 077106 SOB R 1, L 2 ; decrease the byte counter R 1: = R 1-1                                                                     

                                                                      ; until 020000 bytes (010000 words) transmitted

001024 000000 HALT ; end                                                                     

 

Before starting it is necessary to check that PSW = 000200 (otherwise, the program may crash due to the transition to processing an unexpected interrupt) .

The operating time of the program is 8192 bytes / (9600 baud / 11 bits) = 9 seconds.

 

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