- Oh, no shit! ..
- What did you think ...
(from human-computer dialogue)
Dear reader!
By opening the book on this page, you are unlikely to know:
Therefore, you can go directly to Preface 1 .
This long story has little resemblance to the creation of man. Few people remember her. We only got information that computers were invented thousands of times throughout the history of mankind. A curious coincidence - they were invented every time by very lazy people. Laziness successfully passed through the centuries, and the technology of the 19th - 20th centuries (probably of their turn) allowed us to create such a thing as the UKSC (which you probably already saw somewhere).
This so-called communication will now be described to you by any student. Everything is very simple. The person presses the buttons, and the computer does whatever it wants. The desires of a person and a computer, in principle, are not required to coincide. It is curious that a person’s communication with a computer does not pass without a trace neither for a person, nor for a computer.
In other words, there are people who know which buttons they should press on to fulfill certain computer desires.
They are also called programmers. They, in turn, argue that the computer does only what a person orders it. Of course, not a single sane person believes this nonsense (unless he himself is a programmer).
Judge for yourself. Suppose you decide to play TETRIS. What do you type on the keyboard? Of course, "Let's play TETRIS!" <VK>. And what does the car give us ?!
But programmers persist and stand their ground. In their hazy and confused reasoning, all sorts of tricky phrases flicker. The non-Russian word INTERFACE flashes most often, sometimes together with the Russian word FRIENDLY.
Yes, nothing complicated - without blinking an eye, programmers say. Suppose you have a computer. Most likely, there are programs for him. Under the influence of these programs, the computer wants to do something (and sometimes it can even). So, if he makes you understand what he wants from you, and gives you the opportunity to fulfill his wishes in a pleasant and convenient form (for you), then this should be considered a friendly interface.
They think that everything is exactly the opposite, that is, the computer is burning with a desire to please them. This is also one of the manifestations of the user-friendly interface. After talking with such programs, you can imagine anything you like about yourself.
They know what it is. Hence the drowsy look, hence the longing in the gaze.
Once you create a computer, a person becomes his slave. After writing my first program, something like:
10 INPUT "Enter A"; A
20 INPUT "Enter B"; B
thirty ? "A + B ="; A + B,
he is unlikely to rest on his laurels, because programming is like a drug: the more you write programs, the more they become.
In the end, you understand that BASIC is already cramped for you, and move on to a more serious language. Well, if you work at the UKSC, then you will make the journey from BASIC to Assembler lightning fast. Pascal and C are unlikely to delay you.
And here you find that the computer is a much more complicated thing than the one it claims to be. This especially applies again to the UKSC. To work on it in Assembler (what not everyone is capable of), it is not enough to know the language itself. Even a little to own it. You need to know the car itself.
Since you still read to this place, there is nothing more useful now than to continue reading.
Do not resort to anyone's help. Come slowly, with dignity.
A. Knyshev.
By opening the book on this page, you will probably find out:
Literature is informative and instructive . The one that is attached to your computer (or to a complex of computers) may be informative, that is, it may well contain something. But experience shows that this literature can be called instructive with great interference.
There are books that teach assembly style programming . But, as a rule, they do not take into account the specifics of your particular machine. And accounting for it is so important in creating good programs!
You probably will not deny that, in addition to a good idea, the program should also have good means of communication with the user, in other words , FRIENDLY INTERFACE . In the end, she should just look good.
Therefore, I completely devoted this book to the problems (and there are many of them) of creating a user-friendly interface in programs for the UKSC . The fact is that many programmers who write programs for the UK, only vaguely guess about all the features of this machine. "Electronics MS0511" is rich not only in hardware capabilities. Built-in mathematical (aka software) software with skillful use is truly capable of facilitating the work of a programmer. And if its architecture is more or less presented in the "Technical Description", then the possibilities of using the machine equipment using standard routines wired in ROMs have not been fully described anywhere else.
So, the book is devoted to hardware and software tools that "sit" in architecture and ROM. Their use can reduce the time spent writing programs, and possibly raise their level. Once again I note that the programming style in Assembler will not be taught here.
The main recipient of this book is programmers , both beginners and seasoned ones, those who master, or have already mastered Assembler. I really hope that it will help you make your programs shorter and more enjoyable. It is also useful to read some chapters for ordinary users of the Criminal Code. Sometimes it’s just useful to find out what the machine you are working on is capable of.
The book is built on the principle of "bottom-up". That is, first the UCNS hardware is described in detail, whether it be a screen or a keyboard, then it is also examined in detail the maintenance of their standard software, wired in the RAM, and then there are recommendations for the use of all these tools in the programs.
The book has two sections: SCREEN and KEYBOARD . Sections are divided into chapters, and those, in turn, into paragraphs. Almost every paragraph has a short introduction that talks about what can be gleaned from this paragraph, as well as a brief summary summarizing supporting thoughts.
The information in the book can be divided into educational and reference . The training is presented in the main part of the book. Here, in addition to a detailed presentation of the material, there are also practical exercises, mainly mini-programs that can be typed in machine codes right there in half a minute if there is a machine at hand. In general, it is very useful when reading this book to have nearby the UKSC, and no software is required - all examples are based on the machine’s built-in resources.
Background information is collected mainly in tabular applications.
Solving some complex problems is sometimes useful to start from the end. Since the output to the screen is not a simple thing, we will do just that. And the end will be the screen itself.
The screen is usually a TV or monitor. Both of them are black and white, color and off. Moreover, the latter type can easily be turned into one of the first two by including the latter. If you are already confused, who is the first and who is the last, do not be scared. It’s a bit worse if, after connecting a monitor or TV to a computer, instead of a digestible picture, you will find random flickering of bands and running frames at an incredible speed. If we assume that both the monitor (TV) and the computer are operational, it remains only to figure out how to connect one to the other.
Typically, the following signals go from the computer to the screen:
This signal, roughly speaking, controls the position of the electron beam
on the screen.
For black and white screens, this signal controls the brightness of a point in
current position of the electron beam. It is still mixed a little
sync mixtures (for taste).
Control Signals Red (Red), Green (Green) and Blue (Blue)
components of the dot color (for color screens).
The same signal that is fed to the piezodynamic computer. Usually his
connect to the TV in the sound channel board.
All these signals are output to the VM connectors on the back of the computer. There are two of these connectors at UKNC. Therefore, you can connect as many as two monitors to it. (It is curious that a person also has two whole eyes. Coincidence?)
Now it remains to connect the computer. A video cord is included with each machine. In it 10 lived. The signal layout for these cores is as follows:
SS - 10
GND - 2,4,6,8
R - 5
G - 3
B - 1
Video - 9
Sound - 7
To transmit a black and white image, just two wires are enough -: Video and ground. For color, a minimum of 5 is required: R, G, B, SS, and ground.
The voltage at the output of the computer in the video connector is about 1 V.
You obviously know the principle of transmitting a television image. An electron beam controlled by horizontal and vertical scanning signals circulates the entire screen line by line (Figure 1.0).
That is, when moving from the left edge to the right, the beam lights up a line with a variable brightness on the screen, and when it goes back, it goes out and returns to the left edge of the screen, moving slightly down. Next, the process is repeated until the beam reaches the bottom edge of the screen. Then it is extinguished and transferred again to the beginning of the screen. The frame is drawn.
What appeared on the screen is called a video image, or just a picture. The picture is redrawn on the screen 50 times per second. For a time equal to 1/50 of a second, often called a tick , the eye does not have time to forget the old image, so the picture does not flicker.
We will gradually move from the end to the beginning. Now along the video cord, through the “VM” connector, we’ll get into the computer and figure out how the video image is formed.
Among other devices of the UKSC there is a device responsible for image formation. It is called as follows: Video RAM (DRM) Control Unit. Among other functions, its tasks include reading video information on the screen.
We will call video information the data stored in a specially marked area of the main memory of the computer, and this area itself will be called Video RAM (WHO). To understand the structure of the WHO, let's go through the address space of the UKSC.
Among all the micro-computers produced in our country, the UKNTs is the most non-trivial. No other computer will ever meet such an original solution - 2 RAM + 2 processors. We will deal with some issues related to the increased microprocessor capacity of the UKSC later, and now we will move on to the memory structure.
Each processor - central (CPU) and peripheral (PP) has its own RAM. As soon as KM1801BM2 processors are used in the machine, whose address space is 64 Kb, they both take their own 64 Kb with direct memory access.
Take a look at Figure 1.2. Memory cards for both are shown here.
processors with direct access.
The address space of both processors may vary. That is, devices that they can access will change, and the volume of address spaces will not change.
Devices "tightly" connected to the address space are highlighted (*). These include:
in CPU:
User RAM (56 Kb, addresses 0 ... 157777). This is where all user programs are located, whether it is BASIC, RT-11 or your own (if you are not by accident the author of BASIC or RT-11);
In PP:
1) RAM RAM (32 Kb, addresses 0 ... 77777). This RAM is used for system needs. For what - you will soon find out. Interestingly, about 22 KB of these 32 remain free and also usable by the user.
2) System ROM (banks 2-4 at addresses 120000-176777). We also don’t care about him yet. Everything has its turn.
3) PP I / O page. The registers of external and internal devices are displayed here.
Replaceable devices:
CPU:
In the upper addresses (160000 and higher), depending on the operating mode of the CPU (and two of them - HALT and USER) are substituted:
How can these CPU modes be changed from the CPU, it is said in the chapter ....
PP:
The software in its address space has a so-called “window” with addresses 100000-117777, into which it can connect:
1) The first bank of the RAM;
2) One of the three banks of ROM on the external cassette N1;
3) One of the three banks of ROM on the external cassette N2;
4) Nothing at all.
All this is controlled by a special register in the PP I / O page. His address is 177054.
As you can see, each processor looks directly only at its address space, and the total amount of RAM with direct access is:
64 + 32 = 96 Kb.
Example 1. A walk through the address space.
Please get in any way known to you in the CPU monitor. Is the @ icon already visible? So, we are there. The place is the address space of the CPU.
Typing any octal number from 0 to 157776, and pressing the right arrow, you will see the contents of the memory cells with the addresses typed, and by doing the same with the address from 160,000 - you can admire the formidable hangs. You should not pay attention to them, because the UKSC can inform you about its freezing, but not so. This part of the CPU address space is an I / O page. Here you can find cells that do not cause any disturbance on the machine’s side when opened. Most likely, these are the same device registers.
Let's do this experiment: we will write the number 7 in cell 177566. The machine will hum something. This means that the number 7 has got where it should (and should it get into the communication channel with the PP). PP processed our code, responding with a good-natured beep.
For those who are bored of playing in the CPU monitor, I suggest digging into the PP monitor. We get into it like this:
- press <SET>, and the menu "Setting modes" should appear. If it does not appear, check if the computer is really in front of you - this is UKNC;
- press <UPR> + @ or <GRAPH> + <ISP>.
Now we are in the "realm of shadows" - the PP monitor. The screen here is not as spacious as in the CPU monitor. Therefore, advice to those suffering from claustrophobia - do not stay here for long! You can’t get out of this debugger. Sometimes it happens to find in RAM RAM the remains of those who could not get out of the maze of the software monitor. It is their spirits, it seems to me, from time to time that they hang cars. But I was distracted.
The rules of the game with the PC monitor are the same - you can rightfully dig into the contents of any cells from 0 to 77776 (RAM RAM) and admire the cells from 100000 to 176776 (ROM). You can also look at the PP I / O page. The computer, in turn, reserves the right to freeze at any time convenient for it.
If you are tired, exit:
- <OPR> + C,
and then through the "Settings" menu wherever you wish.
I suggest I leave the rest to a place where the human foot has rarely stepped before - in the CPU RAM. To do this, resort to black magic: let's type in the RAM program 2 very small programs:
40000: 012704 MOV # 450, R4
000 450
004737 CALL @ # 162164
162164
40020 : 012704 MOV # 450, R4
00 0450
004737 CALL @ # 162204
162204
Using the first, we will enable the mode of viewing the RAM of the CPU from the PC monitor. Feel free to click 40,000 <IPS>. Two new letters appear at the top: TsM. I don’t know what they mean, but here’s what has changed - you can see. Now we are faced with the pain of the familiar RAM of the user's CPU (at addresses from 0 to 157776) and the completely unfamiliar RAM of the CPU (from 160000 and above). Any way you can crawl into the RAM of the CPU - both write to the cells and read it. But running programs on the CPU from the PC monitor is impossible — even black magic is powerless here.
Before we get out of this enchanted place, we’ll fix something in the CPU RAM:
- in cell 163416 instead of 000021 we write 012500,
- to cell 163450 instead of 000031 - 010045.
Now we run to the CPU monitor with all our feet: <PR> + C, <ENTER>. Our last tricky action yielded results - now from the CPU monitor you can easily "monitor" all CPU RAM - the user and the system. This is the HALT CPU address space.
If you still miss the PP monitor and RAM RAM, go back to the PP monitor and run the second program from address 40020. It's okay that you will not see this previously recorded program - after all, the PP monitor will show these addresses in RAM CPU Dial 40020, squeeze your eyes tight, and press <INF>. If, opening your eyes, in the top line you find the word "PM", then the experiment was a success.
A person quickly gets used to all the good. Therefore, here is the instruction to restore the usual point of view of the CPU monitor (we work in the CPU monitor):
- in cell 163416 we write back 21,
- to cell 163450 - 31.
Well, now we have completely restored the original version: the CPU monitor sees the user's RAM + I / O page, and the PC monitor sees its sovereign address space. Welcome back !
“Do you have a plan, Mr. Fix?”
- Plan, plan ... Yes, I have as many as three plans!
J. Wern "80 days around the world"
96 Kb - it’s not so small for micro-computers. But the screen is a thing that requires a significant part of the machine’s memory. Therefore, in the UKSC along with direct register access to memory is used.
The input / output pages of both processors have registers with which you can look where we have been ordered with direct access. It is done like this.
The address register (RA), which is available to us as a cell in the I / O page, writes, you guessed it, the address. Instantly, the contents of RAM corresponding to the recorded address are read in hardware into another data register (RD). If we now write a number in the RD, then it will be written in hardware to the corresponding address in memory. Each I / O page has its own registers, and each processor can write and read information using its registers.
In this way, we can get, in addition to conventional RAM, also an additional one that goes beyond the address space of processors with direct access. Such additional or upper RAM is called RAM plans.
In fig. 1.3 shows the address space for register access. There are only 3 plans. Each contains 32 Kb. Their addresses in the RA are 100,000 and higher. With RA, less than 100,000, there is access to conventional RAM.
Table 1.1 shows the addresses of RA and RD for each processor. The central processor is available through RA and RD plans 1 and 2, as well as its own RAM. The peripheral processor has access to all RAM in the machine. That is, through the RD, the software can read and write 3 bytes at once. The combination of these three bytes in different plans is called the T-word.
Table 1.1
| Address Register | Data registers | ||
Plan 0 | Plan 1 | Plan 2 | ||
CPU | 177640 | - | 176642 (ml) | 176642 |
PP | 1 77010 | 177012 | 177014 (ml) | 177014 |
Example 2. An example of working with the registers of RA and RD in the CPU.
In the previous example, in order to change something in the CPU RAM, we had to crawl into the PP monitor. "Peeping" for the RAM of the CPU from there was carried out, of course, using register access: through the registers, the access to all the RAM in the machine is accessible through the registers. Now let's try to use the same mechanism, but in the CPU, and more consciously.
I propose to perform such a simple manipulation (in the CPU monitor):
(176640) = 71607 We write using the RA and RD at the addresses
(176642) = 12500 163416 and 163450 some numbers. We write addresses
(176640) = 71624 in the Republic of Armenia somewhat deprived of 2.
(176642) = 10045
After this painstaking work, you can make sure that before you is the RAM of the CPU in HALT mode, and no registers at the addresses 176640 and 176642 are already observed. And since there are none, there’s nothing more to talk about.
In conclusion, a completely useless and irrelevant advice - write in the number 163731 the number 77000 (instead of 71400), and in 163735 - 20077. Have a nice time with the ICP and STOP keys in the CPU monitor!
* * *
Now back to the video information. Video information is nothing more than data stored in RAM plans and read line by line on the screen. In principle, the three plans can be called Video RAM.
Example 3: Saving part of the screen.
Using the register access to WHO from the PP, we will make two subprograms. The first will save the contents of the working screen in the WHO area, which is usually used under the "Setup" menu and under the PP monitor, i.e. to the service screen. The second will restore the contents of the home screen.
Save routine:
60000: 012702 MOV # 100000, R2
100,000
012703 MOV # 154540, R3
154540
M1: 005004 CLR R4
M2: * 010237 MOV R2, @ # 177010
177010
013700 MOV @ # 177012, R0
177012
013701 MOV @ # 177014, R1
177014
* 010337 MOV R3, @ # 177010
177010
010037 MOV R0, @ # 177012
177012
010137 MOV R1, @ # 177014
177014
005204 INC R4
005202 INC R2
005203 INC R3
022704 CMP # 50, R4
000050
001356 BNE M2
062702 ADD # 50, R2
000050
022703 CMP # 157700, R3
175700
100 350 BPL M1
000207 RETURN
The recovery routine differs in only two words (they are marked with an asterisk). Therefore, it’s easier to write a simple copy program than to retype our heavyweight routine.
Copy program:
40040: 012702 MOV # 60000, R2
060 000
012703 MOV # 60100, R3
060100
012701 MOV # 37, R1
000037
M: 012223 MOV (R2) +, (R3) +
077103 SOB M, R1
So, you type the software, type the copy program, start it from the starting address (40040). After that, a copy of the subroutine will appear in the RAM of the software, but already from the address 60100. In it, you swap the contents of the two marked words.
And to call these routines we use local trick - we will make these routines special functions:
13144: 60,000
13146: 60100
Now, when sending the code <001> to the terminal (that is, to the screen) (corresponds to the <UPR> + A key combination), saving will be performed, and when sending the code <002> (<UPR> + B), the upper left quarter of the working screen will be restored .
How is reading video information on the screen?
The UKSC screen consists of 288 video lines. Each line is assigned an address in WHO, from which the contents of three plans are sequentially read so that one bit on the screen corresponds to three bits in three different plans at one address. The color of each of the dots of the line (for color screens), or the gradation of brightness (for black and white) depends on the contents of adjacent bits in the WHO.
These correspondences - line numbers to the starting address in WHO, the colors of the dots to the contents of WHO, and something else are indicated in a special table in the RAM of the software called the LINE TABLE. It is constructed as follows.
Two cells with fixed addresses in RAM RAM - 270 and 272 are the first element of row tables. In general, the number of elements in the table should equal 288 (the number of rows). But the abduction was made so that the first 20 elements in the row table do not indicate the rows, and the reading of information on the screen starts from the 21st.
An element of a row table always contains a pointer to an address in WHO which starts displaying on a given row. This address is in the penultimate word of the element (and the word is 2 bytes). The address here is set in the same way as with register access. That is, addresses starting at 100,000 indicate memory plans, and less than 100,000 at RAM CPU + RAM RAM.
The last word of the element contains the address of the next element of the row table, as well as some information about it.
The format of the last word of the element:
1 to 4 words.
0 - 2 words.
Elements in a row table can be either four-word or two-word. The first element (270 and 272) is always two-word. A two-word element consists of an address in WHO (1st word) and a pointer to the next element (2nd word).
The four-word element in its first two words carries additional information, the 3rd and 4th words have the same purpose as in the two-word element. How the SPLD will interpret the first two words depends on the contents of the 2nd category of the last word of the previous element:
1) if the next element is two-word (1st digit is 0), then
this bit is interpreted simply as the 2nd bit of the address
next item
2) if the next element is still four-word (1st category
equal to 1), then two options are possible:
0 - from the first two words of the next element
the display control register (UO) is loaded;
1 - of which the color management register is loaded
(CA).
Example 4. From upside down and vice versa.
For the sake of entertainment, and only for his sake, this example was conceived. Type in RAM the following fragment:
40100: 012700 MOV # 2500, R0
002500
A: 162710 SUB # 54420, (R0)
054420
005410 NEG (R0)
062700 ADD # 4, R0
000004
020027 CMP R0, # 4666
004666
100,770 BMI A
000207 RETURN
13152: 040100
Now, when the terminal receives the code <004> (<TR> + D), the working screen will turn upside down. This disgrace is canceled all the same code <004>.
Registers UO and CA do not have a fixed address. They can be loaded from the row table any number of times.
This register is very important. He associates the triad in the plans of the WHO (the combination of three bits) the color of the output points, that is, it is the bridge between the video information and the picture. The least significant bit in the triad corresponds to the contents of plan 0, the most significant one corresponds to plan 2.
The color management register consists of two words. The first word defines the colors of those points that correspond to codes from 0 to 3 in the plans of the WHO. The second word defines the colors of triads with contents from 4 to 7.
The format of the first word of the CA register:
The format of the second word of the CA register:
It is easy to notice that each possible code in WHO (and there are only 8 of them) corresponds to a combination of 4 bits. Three of them (R, G, B) are responsible for the component colors in color monitors, and black and white for gradation of brightness: 1 - component is, 0 - component is not. But there is a fourth - Y. This one controls the brightness of all colors at once: 1 - 100% brightness, 0 - 50%. Although during a single video line there can be a maximum of 8 colors at a time, there can be 16 in different lines on the screen.
For black and white screens, the Y signal does not affect the brightness of the image. For them, this fourth bit is irrelevant.
Example 5: Negative service screen.
In order not to overwork in the study of the registers of MA and CA, I will give an example. In the PP monitor, update 2 cells in the TS:
47 00: 042547
4702: 000443
This should be done in spite of all the outrages that will occur on the screen. For greater brilliance, go to the "Setup" menu: <EXT> + C, and admire the result.
The numbers in the words for the CA of the service screen are selected so as to swap the triads - they are now located in the reverse order, hence the screen inversion.
In order to restore the previous position, write down the old values in these cells:
4700: 135230
4702: 177334,
or just dump the car.
Example 6. A flaming screen.
Type the following program in the PP monitor:
40200: 005237 INC @ # 4700
006750
005237 INC @ # 4702
006752
012737 MOV # 1, @ # 7130
000001
007130
000207 RETURN
In cell (7132) write down the address of this subprogram - 40200, and in cell (7130) - one. What is happening now with the colors of the service screen is a consequence of the fact that UTs1 and UTs2 of the corresponding section of the row table increase by 1 with a frequency of 50 Hz.
This register also consists of two words.
The 1st word controls the appearance of the cursor, its horizontal position on the screen, as well as the color.
0-3 digits - brightness and color of the cursor:
1 - there is a component,
0 - no component.
4 digit - cursor type:
1 - graphic cursor,
0 - character.
5-7 digits - the position of the graphic cursor in an octet.
8-14 digits - the position of the cursor (octet) on the screen.
15th category - not used.
The cursor on the screen is formed as follows. The included character cursor is overlaid on top of the line image. It takes 8 consecutively highlighted points, that is, one octet. Its position is determined by 8-14 bits of the first word of the register UO. The minimum position is 0, the maximum is 79. The graphic cursor differs from the character cursor in that out of eight octet points, only one remains on. Its position in the octet is determined by 5-7 digits. The color of the on cursor depends on 0-3 digits.
About turning on / off the cursor.
In the last word of each element of the row table there is a discharge that is responsible for changing the state of the cursor.
This is a zero discharge. If it is installed, the cursor changes its state. That is, if in the previous lines the cursor was turned on (lit), then starting from this line it will turn off, and vice versa. Initially (default), the cursor is off.
Having found this bit set, the UZOU changes the state of the cursor and leaves it so in consecutive lines until the next zero bit of the last element is set, or until the end of the lines.
The blinking cursor is done programmatically.
Do not forget about the 2nd word of the UO register. It is responsible for scaling the image horizontally, as well as for the brightness of the R, G, B signals in the current video line.
Its format:
1 - 100%
0 - 50%.
Table 1.2
Bit contents | Number of dots per line | Number of octets per line | |
four | five | ||
0 | 0 | 640 | 80 |
0 | one | 320 | 40 |
one | 0 | 160 | 20 |
one | one | 80 | ten |
There are 4 screen formats in UKSC. In the maximum number of dots per line mode, video information from 80 consecutive T-words is displayed on the screen, the address of the first is indicated in the table of lines for each line. The mode of the least number of points in a line allows you to display 80 points, that is, only 10 T-words per line. The overall image size does not change. The video image always occupies the entire screen.
The row table allows you to set your own format for each row. The default format is 640 dots per line. By loading the UO register, you can change the format, then the next lines will also establish a new mode, and so on to the line where the UO register is loaded again (or to the end of the row table).
Example 7. The apotheosis of the row table.
This example should be performed only if you are not going to use the AC for any important purpose, because the way out of it is only a system reset.
Enter the PP monitor, and in it - into the terminal mode (by pressing D). And now press the <PR> + V combination and hold it under the crack of the piezodynamics until you get bored.
What you see on the screen will probably serve as the best illustration to the description of the MA and CA, and the entire device of the row table. The command <OPR> + V is the roll scroll command. But, since a roll for the service screen is not provided, such amusing transformations occur with the table of lines that it is reflected on the screen.
1st word - the address in WHO with which the conclusion begins
video information in the current line.
2nd word is the address of the next element in the row table. In three
the least significant bits of the word contain information about the type of the next
element, about switching the cursor in a given line, as well as
it is determined which register of the SLM will be loaded from the following
element, if it is four-word.
1st, 2nd words - interpreted by the OTHER either as a register
display control, or as a color management register.
3rd word - address at WHO.
4th word is the address of the next element.
- scaling the image horizontally.
- the brightness of the components R, G, B in the current line.
How video information gets on the screen, we figured it out. Now consider the methods of generating information at WHO.
Perhaps the easiest way is to record video information in WHO through RA and RD. However, this is not the most effective way to work with the screen at the UKSC. One way to increase efficiency:
You can configure the row table so that it points to addresses less than 100,000, i.e. on RAM CPU and software. Then the WHO information can be changed by direct access, and this is much faster.
However, a problem also appears. The fact is that plans are scattered across different RAMs, and now plan 0 now looks only from the software.
The way out of this situation may be to use not all plans at once, i.e. work only with plans 1 and 2 from the CPU, because it is somewhat faster than the PP. But at the same time, the color of the displayed information will be reduced. In many cases, this is not scary, for example, when displaying text.
You can also coordinate the work of processors so that they write simultaneously in their RAM their portions of information. This method is undoubtedly interesting, and perhaps even beautiful. However complicated.
But there are other possibilities at the UKSC that make it possible to increase the efficiency of programs by shifting some concerns from the shoulders of the programmer to the shoulders of the hardware.
Again, these abilities are provided by the HEI. It consists of several more registers accessible through the PP I / O page:
The first three registers are conveniently considered together, since they are also used together.
Let's imagine the image on the screen as a “picture” of a certain color superimposed on the “background”. It can be a symbol (in the form of a letter, for example) or some specific image.
This representation is convenient if you want to move an object around the screen, for example, in a dynamic game. Very often it is necessary that this object, called a sprite, does not erase the old image, but moves "on top" of it.
To implement this task, you need to perform a sequence of actions:
The most time-consuming task is in paragraph 2. To solve it programmatically, you need to perform a number of bitwise logical operations with the background and sprite.
This operation is implemented in the UKSC hardware. Let our sprite fit in dimensions of 8 consecutive points (horizontally).
The register of points octet is a sprite “layout” in some section.
The logical unit in the byte is the color of the sprite, and 0 is the background color.
The color of the sprite, or point (our sprite is still single-color), defines the register of the color code of the point (177016). Its format:
0 bit - information plan 0.
1st category - information of plan 1.
2 category - information of plan 2.
The background can be multicolor, so the background color code register reflects the contents of the full T-word in the video memory. This register is two-word:
These three registers can participate in the following processes (or phases):
Call:
Reading the octet register of points, for example: TST @ # 177024 .
Act:
The background color code register is loaded from WHO by the contents of three plans in the format presented above, that is, a triad of bits corresponds to each point. Now it can be stored in two RAM cells or in two registers. This is the background, i.e. old image. In this process, 0 is read from the octet register of points; it is available only by appointment. Before this phase, you must first load the RA with the desired address.
Call:
Writing in the octet register of byte points corresponding to the selected sprite section, for example: MOVB (R1) + ?, @ # 177024 .
Act:
a) Modification.
In those triads in the background color code register, to which the set bits of the dot octet register correspond, the value of the point color code register is written in hardware. The remaining triads do not change.
b) Record.
The WHOU plans are loading the modified value of the background color code register.
That is, after this process in the octet, the sprite will be superimposed on top of the background, repainting only those points where it is "present".
To display the entire sprite, you need to repeat these processes several times, each time remembering the register of the background color code after the "read" phase, and change the contents of the RA and the register of the octet of points.
If the sprite is multi-color, then the "modification-record" phase must be carried out sequentially, pre-loading the new values into the point color code register. Remembering the background from the register of the background color code is necessary only once - at the beginning for each octet.
This register allows you to prohibit writing to each memory plan. The address is 177026. Its format is:
0 bit: 1 - write to plan 0 is prohibited.
1 category: 1 - write to plan 1 is prohibited.
2 category: 1 - write to plan 2 is prohibited.
If you prohibit writing to the appropriate plans, reading occurs as usual, but it is no longer possible to write information to the plan using register access. Where and how this excess can be used is described in Chapter 6.
Example 8. A mirage on the screen.
Look at the screen. If it is empty, turn on the machine. Do whatever you like with it, if only the screen displays the largest amount (although the inscription "Download from the network" is quite enough). Now go into the PP monitor, find cell 177026 there. Write in it any number from 1 to 6 (I recommend the value 2).
Exit the PP monitor and continue to work, but so that the image changes. For example, clear the screen. The image will remain on the screen (though not as bright as it was), which remains now protected by the mask register. To remove these ghosts, reset this register: (177026) = 0, and clear the screen.
- octet of points (PO), (177024)
- point color code (RT), (177016)
- background color code (RF), (177020) and (177022)
You’ll chase one hare - you won’t catch two.
A. Knyshev
Let's try to figure out why in the UKSC it was necessary to put 2
processor instead of one, and even the same.
In normal computers (and the UKSC is clearly out of this series), such as the IBM PC, for example, each or almost every external device (let's take the screen and keyboard to them) corresponds to something like its own processor, which only deals with what serves your WU. This achieves a big benefit in speed, and at the same time saves the work (again time) of programmers.
If you implement the same functions that the equipment performs, programmatically using a central processor, which for normal machines has a maximum of one, you get an incident: instead of solving the tasks that the user programs have prepared for him, the processor only has to do that that display something on the screen, accept something from the keyboard or, God forbid, work with drives.
What speed is obtained? Look at the users of the IBM-allegedly compatible "Search" machine, in which all this is implemented programmatically. You will be struck by the slow reaction, sluggish movements and drowsiness of these unfortunates.
And now look at the users of the UKSC! Yes, pride in their own eyes shines directly in their eyes. After all, after all, the whole processor is responsible for the operation of external devices, and the whole RAM of as much as 32 Kb is "thrown" to its needs.
The central processor can calmly, without particularly straining, do its own thing, and all this dirty work, all this fuss with a keyboard, screen, drive is transferred to the peripheral.
Attach the doorbell to the telephone. Then, looking through the peephole door, you can find out who is calling you on the phone.
A. Knyshev
So, each processor is doing its job, and at the same time.
The question arises: how do these guys communicate, because the interaction between them is mandatory, and the overall efficiency of the machine as a whole depends on its effectiveness.
Even when discussing the address space, it was casually noticed that all RAM in the machine is accessible to the peripheral processor through the register access mechanism. Those. he can easily change the RAM of the CPU as well as he changes the WHO.
This approach, of course, does not solve the problem of communication - after all, the CPU does not see through the register access the software and its RAM, and it is after all central!
In order not to fall into melancholy, we will move more to the communication channels between the CPU and the PP. These channels are similar to a wire telegraph or even a two-party telephone. At the same time, there are as many as 3 telephone lines - two bidirectional, i.e. they can be used for data transmission in two directions, and the third is unidirectional.
Information is transmitted by byte. Bidirectional - channels 0 and 1. Unidirectional channel - channel 2. These channels are high-speed, and their throughput is limited only by the speed of the processors.
Each bidirectional channel (0 and 1) from the central processor in the I / O page has 4 registers:
Unidirectional channel (2) has only status and source registers from the CPU side (the CPU can only send information through it).
The PP I / O page has a similar picture. The difference is that the source status registers are combined into one register, the same is done with the receiver status registers. There are no source registers for channel 2 (the software can only receive on it).
Format of state registers:
0-5 digits - not used.
6th bit - permission to interrupt when bit 7 is installed:
1 - interrupt enabled
0 - interruption is prohibited.
7th category:
For sources: readiness for data transfer.
- Reset to the log. 0 when writing to the data register from the CPU.
- Installed in the log. 1 by the RESET command and by reading the corresponding data register from the PP.
For receivers: readiness for receiving data.
- reset to 0 on the RESET command and on reading from the CPU.
- is set to 1 when writing to the corresponding data register by the PP.
Data Register Format:
For sources: writable, read as 0.
For receivers: read-only.
Format of the source state register:
Address 177076
Discharge | Value |
0 | Resolution of interruptions from the zero channel: 1 - interruptions by av.p. are allowed 324 with installed discharge 3. 0 - interrupts are prohibited. |
one | Resolution of interrupts from the first channel: 1 - interruptions by av.p. are allowed 334 with installed discharge 4. 0 - interrupts are prohibited. |
2 | Turn off the channel registers K0 from the address space of the CPU. 1 - off. 0 - included. |
3 | Readiness of the source K0: 1 - K0 is ready to write a new byte. 0 - not ready (previous package was not read). |
four | Readiness of source K1: 1 - ready. 0 - not ready. |
Format of the receiver status register:
Address 177066
Discharge | Value |
0,1,2 | Resolution of channel interruptions 0, 1 and 2, respectively. 1 - allowed. 0 - prohibited |
3,4,5 | Readiness of channels 0, 1, 2, respectively, to receive data. 1 - ready (there is data to read). 0 - not ready. |
6 | Enable interrupt by RESET command (code 000005) on the CPU bus. 1 - interruption is formed according to av.p. 314. 0 - interrupt closed |
The format of the data registers is the same as in the CPU bus.
All these registers are summarized in table 3.1.
Table 3.1 Channel registers CPU and PP
Channel | Register Type | CPU | PP | ||||
Address | a.v.p. | Address | a.v.p. | ||||
0 | A source | with | 177564 | 64 | with | 177076 | 324 |
d | 177566 | d | 177070 | ||||
Receiver | with | 177560 | 60 | with | 177076 | 320 | |
d | 177562 | d | 177060 | ||||
one | A source | with | 176664 | 464 | with | 177076 | 334 |
d | 176666 | d | 177072 | ||||
Receiver | with | 176660 | 460 | with | 177066 | 330 | |
d | 176662 | d | 177062 | ||||
2 | A source | with | 176674 | 474 | with |
|
|
d | 176676 | d |
| ||||
Receiver | with |
|
| with | 177066 | 340 | |
d |
| d | 177064 |
Suppose you wanted to send information from the CPU to the PP via channel K0.
We check the source status register (177564), and if bit 7 is set (the channel is ready for recording), we write the byte to be transmitted to the source data register (177566).
This will reset bit 7, indicating that the channel is busy, and our byte will appear at address 177060 in the I / O page of the PP (receiver data register of the PP).
Usually, an interrupt is enabled in the receiver register (the corresponding bit is set), and since bit 3 is set in the receiver status register (K0 is ready to receive data), the interrupt will work and control will be given to the interrupt processing program, whose address is in cell 320.
As a rule, it reads the data register in the RAM of the software, and the receiver ready bit in the software is reset, and the ready source of the CPU source is also set. The channel has returned to its original state and is ready for a new transfer.
This mechanism is the same for all channels and regardless of which processor acts as a source, which one as a receiver of information.
Example 9. Parallel screen inversion.
Let's run the race two processors. They will invert the video memory of the home screen word by word, each with its own side and with the help of its registers.
The start signal from the CPU to the PC will be transmitted as an interrupt from the 1st channel. To do this, we will make a software inversion program in the form of an interrupt processing program from the receiver K1 in the software. Then, at the start of the program in the CPU, the exact same program will start in the CPU synchronously.
Installing the procedure in the CPU (working in the CPU monitor):
176664: 000100
1000: 012737 MOV # 1, @ # 176666
000001
176666
000137 JMP @ # 40300
040300
40300: 005737 TST @ # 0
* 000000
010046 MOV R0, - (SP)
010146 MOV R1, - (SP)
012700 MOV # 100000, R0
100,000
012701 MOV # 154540, R1
154540
A: 010037 MOV R0, @ # 176640
* 176640
005137 COM @ # 176642
* 176642
005200 INC R0
020001 CMP R0, R1
001371 BNE A
012601 MOV (SP) +, R1
012600 MOV (SP) +, R0
Installing the program in the software (we work in the software monitor):
330: 040300
From address 40300, but already in RAM RAM, write down the same procedure by changing the three words marked with an asterisk:
instead of 0 - 177062,
instead of 176640 - 177010,
instead of 176642 - 177014.
At the end of the procedure, assign code 2 (RTI). Now go into the CPU monitor and start:
1000 <INF>.
The white bar that runs across the screen is the result of a lag in the CPU from the CPU.
Channel K0 is used by system programs for terminal input-output, which, in fact, is the subject of this book. The central processor programs send information to be displayed on the screen, and the peripheral, scanning the keyboard, gives the CPU the final results of this scan.
Channel K1 is responsible for working with the printer (parallel programmable interface).
Channel K2 manages the transfer of data arrays between the RAM of the CPU and external devices available to the peripheral processor.
Using interrupts in the channels saves time in the operation of each processor. Both of them can be engaged in some kind of business, and if one of them is “impatient” to send information to their fellow mind, it is enough for him to record a package on the channel and continue his processor affairs. The second processor will immediately respond with an interrupt to this package and write it to its RAM. Then he himself will decide what to do with it, but for now he leaves the interrupt routine and returns to his interrupted program.
- allow interruptions with av.p. 314 on CPU RESET command.
- turn off the K0 registers from the CPU I / O page.