Video: Lesson P22 - Sound with the SN76489 on the Master System, GameGear, Megadrive (Genesis) and BBC Micro!
www.chibiakumas.com/z80/platform3.php#LessonP22
The SN76489 Sound chip is used on the Master System, GameGear and BBC Micro... while the Genesis does have superior sound, it has backward capability with the older Master System - so we'll use it for now, as all we're trying to do is make simple beeps anyway!
Video: Lesson P22 - Sound with the SN76489 on the BBC Micro!
Video: Lesson P22 - Sound with the SN76489 on the BBC Micro!
Chibi Akuma(s) Comedy-Horror 8-bit Bullet Hell shooter! // 「チビ悪魔」可笑しいゴシックSTG ! // Work in Progress: ChibiAliens
Interested in CPU's :Z80,6502,68000,6809,ARM,8086,RISC-V
Learning: 65816,ARM,8086,6809
Interested in CPU's :Z80,6502,68000,6809,ARM,8086,RISC-V
Learning: 65816,ARM,8086,6809
Re: Video: Lesson P22 - Sound with the SN76489 on the BBC Micro!
Richard Broadhurst posted the following comment to youtube:
I don't think that your code will work as expected on a real BBC Micro, nor a correctly implemented emulator. On the Z80, the out blocks the Z80 until the SN76489 has read the value, but on the beeb, the signal is not connected and so you must leave the data on the "slow bus" for at least 8us (this may also apply to the 68K, I don't know).
I use this code to write a byte, but there are many ways to do this!
.snd_write_A \\ A is written to sound slow data bus : Z=0 A=8 X=X Y=Y
{
; SEI
sta SysViaRegA \\ sample says SysViaRegH but OS uses no handshake \\ handshake regA
lda #0+0 : sta SysViaRegB \\ enable sound for 8us
PHA : PLA : NOP : NOP \\ 3+4+3+4 + 2(lda #) = 16 clocks = 8us
lda #0+8 : sta SysViaRegB \\ disable sound
; CLI
RTS
}
If the OS is still running, then it is better to disable interrupts as DDRA may be changed for reading keyboard etc DDRB is only set to &0F by the OS, so this should be OK (although not best practice!).
PS You don't need to enable and disable the sound chip between writes as long as they are timed correctly, but leaving them enabled permanently will keep resetting the "random" seed if the last command was a channel 3 tone command!
PPS Not enabling and disabling will probably break the code on some emulator(s)!
I don't think that your code will work as expected on a real BBC Micro, nor a correctly implemented emulator. On the Z80, the out blocks the Z80 until the SN76489 has read the value, but on the beeb, the signal is not connected and so you must leave the data on the "slow bus" for at least 8us (this may also apply to the 68K, I don't know).
I use this code to write a byte, but there are many ways to do this!
.snd_write_A \\ A is written to sound slow data bus : Z=0 A=8 X=X Y=Y
{
; SEI
sta SysViaRegA \\ sample says SysViaRegH but OS uses no handshake \\ handshake regA
lda #0+0 : sta SysViaRegB \\ enable sound for 8us
PHA : PLA : NOP : NOP \\ 3+4+3+4 + 2(lda #) = 16 clocks = 8us
lda #0+8 : sta SysViaRegB \\ disable sound
; CLI
RTS
}
If the OS is still running, then it is better to disable interrupts as DDRA may be changed for reading keyboard etc DDRB is only set to &0F by the OS, so this should be OK (although not best practice!).
PS You don't need to enable and disable the sound chip between writes as long as they are timed correctly, but leaving them enabled permanently will keep resetting the "random" seed if the last command was a channel 3 tone command!
PPS Not enabling and disabling will probably break the code on some emulator(s)!
Chibi Akuma(s) Comedy-Horror 8-bit Bullet Hell shooter! // 「チビ悪魔」可笑しいゴシックSTG ! // Work in Progress: ChibiAliens
Interested in CPU's :Z80,6502,68000,6809,ARM,8086,RISC-V
Learning: 65816,ARM,8086,6809
Interested in CPU's :Z80,6502,68000,6809,ARM,8086,RISC-V
Learning: 65816,ARM,8086,6809