6809 Assembly programming for the TRS-80 CoCo 3

The CoCo 3 is backwards compatible with the original CoCo/Dragon

It has been extended with a chip known as the 'GIME... this enhances the CoCo with better graphics and bank switching extra memory

Clever owners of the CoCo even figured out that the Cpu could be swapped with the more advanced 6309



Tandy CoCo 3 (TRS-80 Color Computer 3)
Cpu 1.8 mhz 6809/6309
Ram 128kk
Max Resolution
Up to
320x200 @ 16 color



Extended Memory Map

Page 19 bit address Purpose Default Logical 16 bit address
$00 $00000 512k upgrade
$30 $60000 High Res Screen Ram
$34 $68000 High Res Buffer
$35 $6A000 Secontry Stack
$36 $6C000 High Res Text Screen
$37 $6E000 Unused
$38 $70000 Basic 32k $0000
$3C $78000 Extended Color Basic $8000
$3D $7A000 Color Basic $A000
$3E $7C000 Cartridge $C000
$3F $7E000 Super Extended Basic $E000

$7FF00 Dedicated Addresses $FF00

$7FFFF ----------------------------- $FFFF

MMU Bank Switching

Bank switching is performed by addresses $FFA0-FFAF

There are two sets of options Task 0 (Executive Set) and Task 1 (Task Set)... which of these is active is selected by bit 0 of $FF91... this allows for quick switching between two options



$FF91 Bit0=0 $FF91 Bit0=1
Bank Address Range Executive  Set Task Set Default
0 $0000 $FFA0 $FFA8 $38
1 $2000 $FFA1 $FFA9 $39
2 $4000 $FFA2 $FFAA $3A
3 $6000 $FFA3 $FFAB $3B
4 $8000 $FFA4 $FFAC $3C
5 $A000 $FFA5 $FFAD $3D
6 $C000 $FFA6 $FFAE $3E
7 $E000 $FFA7 $FFAF $3F


GIME Addresses


Address ShortName Purpose Bits Sample Notes
$FF90 INIT0 Init Register 0 CMIFRSr-
C=Coco12 M=Mmu on
$FF91 INIT1 Init Register 1 -MT-----m
m=mmu TASK T=Timer spped M=Memory type
$FF92 IRQEN IRQ enable --THVRKC
C=Cart K=Key R=Rs232 V=Vsync H=Hsync T=Timer
$FF93 IFRQEN FIRQ Enable --THVRKC
C=Cart K=Key R=Rs232 V=Vsync H=Hsync T=Timer
$FF94 TIMERH Timer H Byte ----HHHH
12 bit Timer
$FF95 TIMERH Timer L Byte LLLLLLLL
12 bit Timer
$FF96
Unused


$FF97
Unused


$FF98 VMODE Video Mode P-DMFLLL
L=Lines per row / F=Freq (60/50) M=Mono D=Descender P=Planes(Text/Graphics)
$FF99 VRES Video Resolution -LLBBBCC
C=Colors () B=Bytes per row (6=128) L=Lines (0=192)
$FF9A BCOLOR Border Color --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FF9B VBANK 2MB Upgrade ------VV

$FF9C VSCROLL Vertical Scroll ----VVVV
Vertical Smooth SCroll
$FF9D VOFF_H Vertical Offset H
$C0 Screen Ram Address /8.... $C000 =$60000
$FF9E VOFF_L Vertical Offset L
$00 Screen Ram Address /8.... $C000 =$60000
$FF9F HOFF Horizontal offset VOOOOOOO
V=Use Virtual screen (256 bytes wide) O=Hoffset
$FFA0 MMU0_0 MMU Task 0 $0000-1FFF ---HHHHH $38
$FFA1 MMU0_1 MMU Task 0 $2000-3FFF ---HHHHH $39
$FFA2 MMU0_2 MMU Task 0 $4000-5FFF ---HHHHH $3A
$FFA3 MMU0_3 MMU Task 0 $6000-7FFF ---HHHHH $3B
$FFA4 MMU0_4 MMU Task 0 $8000-9FFF ---HHHHH $3C
$FFA5 MMU0_5 MMU Task 0 $A000-BFFF ---HHHHH $3D
$FFA6 MMU0_6 MMU Task 0 $C000-DFFF ---HHHHH $3E
$FFA7 MMU0_7 MMU Task 0 $E000-FFFF ---HHHHH $3F
$FFA8 MMU1_0 MMU Task 1 $0000-1FFF ---HHHHH $38
$FFA9 MMU1_1 MMU Task 1 $2000-3FFF ---HHHHH $39
$FFAA MMU1_2 MMU Task 1 $4000-5FFF ---HHHHH $3A
$FFAB MMU1_3 MMU Task 1 $6000-7FFF ---HHHHH $3B
$FFAC MMU1_4 MMU Task 1 $8000-9FFF ---HHHHH $3C
$FFAD MMU1_5 MMU Task 1 $A000-BFFF ---HHHHH $3D
$FFAE MMU1_6 MMU Task 1 $C000-DFFF ---HHHHH $3E
$FFAF MMU1_7 MMU Task 1 $E000-FFFF ---HHHHH $3F
$FFB0 PAL0 Palette entry 0 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB1 PAL1 Palette entry 1 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB2 PAL2 Palette entry 2 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB3 PAL3 Palette entry 3 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB4 PAL4 Palette entry 4 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB5 PAL5 Palette entry 5 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB6 PAL6 Palette entry 6 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB7 PAL7 Palette entry 7 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB8 PAL8 Palette entry 8 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFB9 PAL9 Palette entry 9 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFBA PAL10 Palette entry 10 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFBB PAL11 Palette entry 11 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFBC PAL12 Palette entry 12 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFBD PAL13 Palette entry 13 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFBE PAL14 Palette entry 14 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits
$FFBF PAL15 Palette entry 15 --RGBRGB
Birt 0-2=low bits bits 3-5 = top bits


See the Dragon/CoCo documentation for more!

 

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