68000 Assembly Programming for the Sega Genesis (Mega Drive)

The Genesis is Sega's 16 bit sucessor to the Master System... With some backwards compatibility at a hardware level, and much more powerful graphics and the CPU... the Genesis was a huge step up from the 8 bit generation

While the 68K CPU was massivly superior to that of the Super nintendo, unfortunately the Mode 7 capabilities of the SNES hardware more than made up for it, and the FX chip pretty much doomed the Genesis... but for the programmer, the Genesis is a great system giving the ease and power of the 68000, and a more conventional graphics system than the ROM based NeoGeo!
Specs:
Sega Genesis
Cpu 8mhz 68000
Ram 64K
Vram 64K
Resolution 320x224
Bitmap planes 2 x 16 color
Max Sprites 80 sprites 16 color  (8x8 px 20 per line)
Sound chip Z80 (8K Ram) + YM2612 FM + PSG



68000 Memory Map
Start address End address Description
$000000 $3FFFFF Cartridge ROM/RAM
$400000 $7FFFFF Reserved (used by the Sega CD and 32x)
$800000 $9FFFFF Reserved (used by the 32x?)
$A00000 $A0FFFF Z80 addressing space
$A10000 $A10001 Version register (read-only word-long)
$A10002 $A10003 Controller 1 data
$A10004 $A10005 Controller 2 data
$A10006 $A10007 Expansion port data
$A10008 $A10009 Controller 1 control
$A1000A $A1000B Controller 2 control
$A1000C $A1000D Expansion port control
$A1000E $A1000F Controller 1 serial transmit
$A10010 $A10011 Controller 1 serial receive
$A10012 $A10013 Controller 1 serial control
$A10014 $A10015 Controller 2 serial transmit
$A10016 $A10017 Controller 2 serial receive
$A10018 $A10019 Controller 2 serial control
$A1001A $A1001B Expansion port serial transmit
$A1001C $A1001D Expansion port serial receive
$A1001E $A1001F Expansion port serial control
$A10020 $A10FFF Reserved
$A11000
Memory mode register
$A11002 $A110FF Reserved
$A11100 $A11101 Z80 bus request
$A11102 $A111FF Reserved
$A11200 $A11201 Z80 reset
$A11202 $A13FFF Reserved
$A14000 $A14003 TMSS register
$A14004 $BFFFFF Reserved
$C00000
VDP Data Port
$C00002
VDP Data Port (Mirror)
$C00004
VDP Control Port
$C00006
VDP Control Port (Mirror)
$C00008
H/V Counter
$C0000A
H/V Counter (Mirror)
$C0000C
H/V Counter (Mirror)
$C0000E
H/V Counter (Mirror)
$C00011
SN76489 PSG
$C00013
SN76489 PSG (Mirror)
$C00015
SN76489 PSG (Mirror)
$C00017
SN76489 PSG (Mirror)
$C0001C
Disable/Debug register
$C0001E
Disable/Debug register (Mirror)
$C0001E $FEFFFF Reserved
$FF0000 $FFFFFF 68000 RAM
Z80 Memory Map
From To Meaning
$0000 $1FFF Sound Ram
$2000 $3FFF Reserved
$4000
YM2612 A0
$4001
YM2612 D0
$4002
YM2612 A1
$4003
YM2612 D1
$4000 $5FFF Sound Chip
$6000
Bank Register
$6000 $7F10 Misc
$7F11
PSG 76489
$7F12 $7FFF Misc
$8000 $FFFF 68000 Bank


VDP Registers
RegNum Meaning

Sample Result
0 mode register 1 ---H-1M-
$04 no H interrupt
1 mode register 2 -D-V-D-P1--
$14 blanked, no V interrupt, DMA enable
2 name table base for scroll A (A=top 3 bits) --AAA---
$30 $C000
3 name table base for window (A=top 4 bits / 5 in H40 Mode) --AAAAA-
$3C $F000
4 name table base for scroll B (A=top 3 bits) -----AAA
$07 $E000
5 sprite attribute table base (A=top 7 bits / 6 in H40) -AAAAAAA
$6C $D800
6 unused register

$00 $00
7 background color (P=Palette C=Color) --PPCCCC
$00 $00
8 unused register

$00 $00
9 unused register

$00 $00
10 H interrupt register (L=Number of lines) LLLLLLLL
$FF $FF (esentially off)
11 mode register 3 ----IVHL
$00 disable ext int, full H/V scroll
12 mode register 4 (C bits both1 = H40 Cell) C---SIIC
$81 40 cell horizontal mode, no interlace
13 H scroll table base (A=Top 6 bits) --AAAAAA
$37 $FC00
14 unused register

$00 $00
15 auto increment (After each Read/Write) NNNNNNNN
$01 $01
16 scroll size (Horiz & Vert size of ScrollA & B) --VV-HH
$01 V 32 cell, H 64 cell
17 window H position (D=Direction C=Cells) D—CCCCC
$00 $00
18 window V position (D=Direction C=Cells) D—CCCCC
$00 $00
19 DMA length count low LLLLLLLL
$FF $00FF
20 DMA length count high HHHHHHHH
$FF $Ffxx
21 DMA source address low LLLLLLLL
$00 $xxxx00
22 DMA source address mid MMMMMMMM
$00 $xx00xx
23 DMA source address high (C=CMD) CCHHHHHH
$80 VRAM fill, addr $00xxxx
l
Color Ram addresses
Palette ColorNum Address Palette ColorNum Address Palette ColorNum Address Palette ColorNum Address
Palette 0 Color 0 $C0000000 Palette 1 Color 0 $C0200000 Palette 2 Color 0 $C0400000 Palette 3 Color 0 $C0600000

Color 1 $C0020000
Color 1 $C0220000
Color 1 $C0420000
Color 1 $C0620000

Color 2 $C0040000
Color 2 $C0240000
Color 2 $C0440000
Color 2 $C0640000

Color 3 $C0060000
Color 3 $C0260000
Color 3 $C0460000
Color 3 $C0660000

Color 4 $C0080000
Color 4 $C0280000
Color 4 $C0480000
Color 4 $C0680000

Color 5 $C00A0000
Color 5 $C02A0000
Color 5 $C04A0000
Color 5 $C06A0000

Color 6 $C00C0000
Color 6 $C02C0000
Color 6 $C04C0000
Color 6 $C06C0000

Color 7 $C00E0000
Color 7 $C02E0000
Color 7 $C04E0000
Color 7 $C06E0000

Color 8 $C0100000
Color 8 $C0300000
Color 8 $C0500000
Color 8 $C0700000

Color 9 $C0120000
Color 9 $C0320000
Color 9 $C0520000
Color 9 $C0720000

Color 10 $C0140000
Color 10 $C0340000
Color 10 $C0540000
Color 10 $C0740000

Color 11 $C0160000
Color 11 $C0360000
Color 11 $C0560000
Color 11 $C0760000

Color 12 $C0180000
Color 12 $C0380000
Color 12 $C0580000
Color 12 $C0780000

Color 13 $C01A0000
Color 13 $C03A0000
Color 13 $C05A0000
Color 13 $C07A0000

Color 14 $C01C0000
Color 14 $C03C0000
Color 14 $C05C0000
Color 14 $C07C0000

Color 15 $C01E0000
Color 15 $C03E0000
Color 15 $C05E0000
Color 15 $C07E0000

Colors are defined by 16 bits in the following format

  F    E    D    C    B    A    9    8      7    6    5    4    3    2     1     0  
- - - - B2 B1 B0 - G2 G1 G0 - R2 R1 R0 -

Vram Addressing
The Genesis has 64k Vram - the purpose of each memory position is configurable, but a suggested memory map is shown to the right.

Selecting a memory address is performed by sending 4 bytes...  to the Control port, however the structiure of these bytes - and their relation to the address selected is slightly odd.. this is possibly due the "Backwards compatibility" with the SMS

Genesis tiles are 8x8, and 4 bits per pixel, so 32 bytes per tile

Memory Address Byte Command
$0000 $40000000
$1000 $50000000
$2000 $60000000
$3000 $70000000
$4000 $40000001
$5000 $50000001
$6000 $60000001
$7000 $70000001
$8000 $40000002
$9000 $50000002
$A000 $60000002
$B000 $70000002
$C000 $40000003
$D000 $50000003
$E000 $60000003
$F000 $70000003
$FFFF $7FFF0003
Vram Address Possible Use
$0000 Pattern definitions
$C000 Scroll A – Tilemap
$D800 Sprite Attrib table
$E000 Scroll B – Tilemap
$F000 Window Map
$FC00 Hscroll Table

Sound
The Genesis has backwards compatibility with the SMS/GG SN76489

If we're getting the Genesis Z80 to control the SN76489, we can just send data to port &7F again!
Unlike the NeoGeo, we can access the sound chip from the 68000 - which is probably easier!... we do this by writing to port &C00011

The data uses the format below
Bits
Command Bit Details  7  6  5  4  3  2  1  0
Format Template L=Latch C=Channel T=Type XXXX=Data L C C T D D D D
Tone - Command 1/2 C=Channel L=tone Low data 1 C C 0 L L L L
Tone - Command 2/2 H= High tone data (Higher numbers = lower tone) 0 - H H H H H H
Volume C=Channel (0-2)  V=Volume (15=silent 0=max) 1 C C 1 V V V V
Noise Channel (Channel 3)  M=Noise mode (1=white) R=Rate (3=use tone 2) 1 1 1 0 - M R R


Genesis Links
Genesis_Technical_Overview_v1.00_1991_Sega_US PDF
MegaDrive Development Wiki