PDP-11 for the UKNC

60	CH0 IN Interrupt	Channel 0
64	CH0 OUT Interrupt	Channel 0
460	CH1 IN Interrupt	Channel 1
464	CH1 OUT Interrupt	Channel 1
474	CH2 OUT Interrupt	Channel 2
176000	Windows Register
176000	Window A register
176001	Window B register
176640	Bitplanes address register (RA)
176642	Write Plane 1 (Green) (RD)
176643	Write Plane 2 (Red) (RD)
176660	C1 in STATUS	Channel 1
176662	C1 in DATA	Channel 1
176664	C1 out STATUS	Channel 1
176666	C1 out DATA	Channel 1
176674	C2 out STATUS	Channel 2
176676	C2 out DATA	Channel 2
177560	C0 Console in STATUS	Channel 0
177562	C0 Console in DATA	Channel 0
177564	C0 Console out STATUS	Channel 0
177566	C0 Console out DATA	Channel 0

300	Keyboard interrupt vector
304	Programmable timer interrupt
310	External event interrupt
314	;RESET on CPU bus interrupt
320	CH0 IN Interrupt	Channel 0
324	CH0 OUT Interrupt	Channel 1
330	CH1 IN Interrupt	Channel 1
334	CH1 OUT Interrupt	Channel 2
340	CH2 IN Interrupt	Channel 2
177010	Bitplanes address register (RA)
177012	Write Plane 0 (Blue) (RD)
177014	Write Plane 1 (Green) (RD)
177015	Write Plane 2 (Red) (RD)
177016	PPU dots color
177020	PPU bitplanes 0/1 background color
177022	PPU bitplanes 1/2 background color
177024	PPU dots octet
177026	PPU bitplanes mask register
177054	Window (100000-117777)
177060	C0 in DATA	Channel 0
177062	C1 in DATA	Channel 1
177064	C1 in DATA	Channel 2
177066	C0 in STATUS	Channel 0
177066	C1 in STATUS	Channel 1
177066	C2 in STATUS	Channel 2
177070	C0 out DATA	Channel 0
177072	C1 out DATA	Channel 1
177076	C0 out STATUS	Channel 0
177076	C1 out STATUS	Channel 1
177320	Joystick "Diana", etc.
177700	Keyboard state register
177702	Keyboard data register
177710	State register	DI------ D=Data Waiting (1=Yes) I=Interrupts Enabled(1=on)
177712	Buffer register	SKKKKKKK S=State(0=pressed 1=released) K=Keycode 0-127 (0-15 when released - parital only)
177714	Current state register
177716	System control register - Bit 7 - Beeper

The top 32k is used for VRAM, The top 32k of Bank 0 makes up the 'Blue' bitplane, The top 32k of Bank 1 makes up the 'Green' bitplane, The top 32k of Bank 2 makes up the 'Red' bitplane.

The 32k of banks 1+2 are combined to make up the 64k ram used by the Main CPU (the one that runs our program)... bytes from Bank 1 are at Even Addresses, Bytes from Bank 2 are at Odd addresses of the Main CPU ram.

The 32k of Bank 0 makes up the 32k Low area of the Peripheral Processor (PP) Sub CPU (the top 32k is rom).

There is no way to 'swap' these ram banks via bankswitching, however the CPU's can access the VRAM, and the Peripheral Processor 'PP' Sub CPU can access the Main CPU's ram via the 'RAP' device.

The RAP device is a third chip which has complete access to all the memory, we select an address with one port, then write data with the other two or three (depending on CPU - the SUB PP CPU can access all 3, the main CPU can access only 2)... this is how we typically write to VRAM.

It is also possible to re-configure the SLTAB line table, and move the visible RAM into an area the CPU's can directly access, however this will reduce the RAM available for other purposes.

Low 32k uses Bank 0 RAM (both odd and even), High 32k uses ROM (both odd and even)

312 (1..312) lines is SECAM half-frame
309 (1..309) SLTAB records in total (lines 4..312 of SECAM's half-frame)
scanlines 1..19 are not visible due to the vertical blanking interval
scanlines 20..307 are visible (lines 23-310 of SECAM's half-frame)
scanlines 308..309 are not visible due to the vertical blanking interval

4 word
record

Options

YRGB=Cursor color & Brightness / T=Type (Char/Graphic) / G=Graphic Cursor pos / C=Cursor pos

RGB= Line Brightness S=Scale (640/320/160/80)

V=Vram Address

C=Toggle Cursor on/off L=Length of next record (2/4 words)
S= 4-word selector (Options/Palette) / 2-word address bit 2 A=Address bits 3-15

4 word
record

palette

Palette bit combos %011 %010 %001 %001

Palette bit combos %111 %110 %101 %100

V=Vram Address

C=Toggle Cursor on/off L=Length of next record (2/4 words)
S= 4-word selector (Options/Palette) / 2-word address bit 2 A=Address bits 3-15